Register Transfer And Microoperations

What does your microoperation sequence mean to the CPU if the notation is ambiguous? Register Transfer Language (RT-Lang) defines a compact, unambiguous syntax for expressing transfers, conditions, and ordered microoperations inside a control step.

Overview

This section documents RT-Lang syntax for transfers (`←`), conditional execution (`IF ... THEN ...`), and sequencing (`;`). Use it when writing or reviewing microoperation control logic to ensure the intended register, bus, and ALU actions map cleanly to hardware.

Quick Reference

Common tokens

• `←` transfer arrow
• `;` statement separator (sequencing)
• `IF ... THEN ...` conditional guard
• `Z, N, C, V` status flags (zero, negative, carry, overflow)

Parameters

Code Example

; Priya: express a conditional register load sequence for a control step

; Assumptions:
; - Flags (Z, N, C, V) are updated by the most recent ALU operation.
; - (BUS) denotes the current bus value selected by the control unit.

; 1) Compute candidate result and update flags
R3 ← R1 + R2        ; ALU add; Z/N/C/V reflect this operation

; 2) Conditional transfer based on Zero flag
IF Z = 1 THEN R4 ← R3

; 3) Ordered bus read for an address register if result is non-negative
IF N = 0 THEN MAR ← (BUS) ; bus must already be driven with the intended address source

; 4) End of microoperation sequence for this control step
; (Statements separated by ';' execute in order)

Response Format

{
  "rtlang": {
    "statements": [
      {
        "type": "transfer|conditional|expression",
        "text": "string",
        "destination": "register | null",
        "source": "register | expression | bus | null",
        "condition": "boolean expression | null",
        "sequence_index": 0
      }
    ],
    "bus_reads": [
      {
        "destination": "register",
        "source": "(BUS)",
        "requires_bus_driver": true
      }
    ],
    "flags_used": ["Z", "N", "C", "V"]
  },
  "validation": {
    "parsed_ok": true,
    "errors": [
      {
        "code": "string",
        "message": "string",
        "location": { "sequence_index": 0, "span": [0, 0] }
      }
    ]
  }
}

Field meanings:

• `statements[]`: ordered parse of each `stmt` in the microoperation sequence.
• `bus_reads[]`: explicit tracking of `(BUS)` usage to prevent missing bus-driver selection.
• `validation.errors[]`: syntax/semantic issues such as undefined registers or malformed `IF`.

Notes & Best Practices

• Sequencing is explicit: use `;` to enforce order. Without it, a decoder may treat statements as parallel in the same control tick.
• Guarded bus reads require a bus driver: `(BUS)` only yields a meaningful value if the control unit selects a source onto the bus in the same or preceding step.
• Flag dependencies are temporal: `cond` tests flags produced by the most recent ALU microoperation; avoid mixing unrelated flag producers.
• Prefer fully specified conditions: write `Z=1` rather than relying on implicit truthiness, especially when conditions include multiple flags or bit slices like `IR[15:12]`.

This syntax becomes the input format for the next chapter’s microoperation sequencing and control decoding rules, where these RT-Lang statements are mapped onto concrete register, bus, and ALU actions.